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* Improvements of DMA engineSuren A. Chilingaryan2011-10-261-17/+103
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* Precisely estimate used buffers for C2S enginesSuren A. Chilingaryan2011-10-221-1/+1
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* Provide information about active DMA engines & buffersSuren A. Chilingaryan2011-10-221-7/+245
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* Accept short addresses for IPECamera FPGA registersSuren A. Chilingaryan2011-10-211-1/+8
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* Remove short option for benchmark in cliroot2011-10-211-3/+3
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* Support exporting data from kernel buffersroot2011-10-211-11/+66
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* Print propper number of strings in cli in case of DMA readroot2011-07-271-0/+1
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* Few fixes for IPE Camera modificationSuren A. Chilingaryan2011-07-191-1/+3
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* IRQ acknowledgement support in the engine APISuren A. Chilingaryan2011-07-181-2/+7
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* Support writting output to fileSuren A. Chilingaryan2011-07-181-47/+72
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* Change timeout definition in Events API from struct timespec to pcilib_timeout_tSuren A. Chilingaryan2011-07-181-1/+1
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* Do not try to verify write-only registersSuren A. Chilingaryan2011-07-171-10/+15
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* Support forceful clean-up of kernel memorySuren A. Chilingaryan2011-07-171-2/+45
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* List kernel buffersSuren A. Chilingaryan2011-07-171-28/+188
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* Few fixesSuren A. Chilingaryan2011-07-171-15/+24
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* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-171-4/+4
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* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-141-1/+2
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* Support iterations argument and fix interpretation of size argument for ↵Suren A. Chilingaryan2011-07-131-6/+14
| | | | benchmarking
* Report writted register in hex if it was specified in hexSuren A. Chilingaryan2011-07-121-3/+23
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* Few fixesSuren A. Chilingaryan2011-07-121-6/+14
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* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-121-1/+1
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* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-121-9/+151
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* Fix compilation issuesSuren A. Chilingaryan2011-07-111-1/+1
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* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-111-0/+5
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* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-111-4/+4
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* Minor improvementSuren A. Chilingaryan2011-07-111-7/+7
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* Change cli parameters (reserve -t parameter for future use as timeout)Suren A. Chilingaryan2011-07-111-25/+41
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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-0/+8
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-091-37/+53
| | | | (bitmasks), list NWL DMA registers
* Fix segmentation failure in DMA access modeSuren A. Chilingaryan2011-07-061-1/+5
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* A bit of renamingSuren A. Chilingaryan2011-07-061-6/+6
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* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-54/+179
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* North West Logick DMA implementationroot2011-07-041-5/+37
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* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-25/+47
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* Enumerate DMA enginesroot2011-06-171-1/+2
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* A bit of DMA infrastructureroot2011-06-161-3/+49
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* Move to new FPGA designroot2011-06-161-9/+31
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* Do not crash if model is not definedSuren A. Chilingaryan2011-05-181-6/+8
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* Introduce pcilib_context_t type instead pointer to voidSuren A. Chilingaryan2011-04-141-1/+1
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* Support quiete mode to suppress warningsSuren A. Chilingaryan2011-04-131-2/+14
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* clean upSuren A. Chilingaryan2011-04-121-1/+1
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* Prototype of IPECamera image protocolSuren A. Chilingaryan2011-04-121-6/+8
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* Infrastructure for event APISuren A. Chilingaryan2011-04-121-8/+84
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* Support memset operationSuren A. Chilingaryan2011-04-061-4/+22
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* Fix exiting on warningsSuren A. Chilingaryan2011-03-251-1/+1
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* Set warning handlerMatthias Vogelgesang2011-03-141-1/+1
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* Suppress warningSuren A. Chilingaryan2011-03-111-1/+1
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* Provide single header for librarySuren A. Chilingaryan2011-03-091-1/+1
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* Support for FPGA registersSuren A. Chilingaryan2011-03-091-8/+9
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* Support writting and reading of register rangesSuren A. Chilingaryan2011-03-091-3/+69
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