| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | Implement DMA access synchronization for NWL implementation | Suren A. Chilingaryan | 2011-07-17 | 1 | -4/+4 | |
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| * | First iteration of work to preserve DMA state between executions | Suren A. Chilingaryan | 2011-07-14 | 1 | -1/+2 | |
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| * | Support iterations argument and fix interpretation of size argument for ↵ | Suren A. Chilingaryan | 2011-07-13 | 1 | -6/+14 | |
| | | | | | benchmarking | |||||
| * | Report writted register in hex if it was specified in hex | Suren A. Chilingaryan | 2011-07-12 | 1 | -3/+23 | |
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| * | Few fixes | Suren A. Chilingaryan | 2011-07-12 | 1 | -6/+14 | |
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| * | Provide IRQ enable/disable call | Suren A. Chilingaryan | 2011-07-12 | 1 | -1/+1 | |
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| * | Suppport DMA modes in console application (not functional yet) | Suren A. Chilingaryan | 2011-07-12 | 1 | -9/+151 | |
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| * | Fix compilation issues | Suren A. Chilingaryan | 2011-07-11 | 1 | -1/+1 | |
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| * | Reorganization of NWL engine, step 1 | Suren A. Chilingaryan | 2011-07-11 | 1 | -0/+5 | |
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| * | Wait for the completion of DMA operations during writes | Suren A. Chilingaryan | 2011-07-11 | 1 | -4/+4 | |
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| * | Minor improvement | Suren A. Chilingaryan | 2011-07-11 | 1 | -7/+7 | |
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| * | Change cli parameters (reserve -t parameter for future use as timeout) | Suren A. Chilingaryan | 2011-07-11 | 1 | -25/+41 | |
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| * | IRQ support in NWL DMA engine | Suren A. Chilingaryan | 2011-07-11 | 1 | -0/+8 | |
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| * | Support dynamic registers, support register offsets and multiregisters ↵ | Suren A. Chilingaryan | 2011-07-09 | 1 | -37/+53 | |
| | | | | | (bitmasks), list NWL DMA registers | |||||
| * | Fix segmentation failure in DMA access mode | Suren A. Chilingaryan | 2011-07-06 | 1 | -1/+5 | |
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| * | A bit of renaming | Suren A. Chilingaryan | 2011-07-06 | 1 | -6/+6 | |
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| * | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | 2011-07-06 | 1 | -54/+179 | |
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| * | North West Logick DMA implementation | root | 2011-07-04 | 1 | -5/+37 | |
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| * | DMA engine initialization and basic intrastructure for DMA read/write | root | 2011-06-18 | 1 | -25/+47 | |
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| * | Enumerate DMA engines | root | 2011-06-17 | 1 | -1/+2 | |
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| * | A bit of DMA infrastructure | root | 2011-06-16 | 1 | -3/+49 | |
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| * | Move to new FPGA design | root | 2011-06-16 | 1 | -9/+31 | |
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| * | Do not crash if model is not defined | Suren A. Chilingaryan | 2011-05-18 | 1 | -6/+8 | |
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| * | Introduce pcilib_context_t type instead pointer to void | Suren A. Chilingaryan | 2011-04-14 | 1 | -1/+1 | |
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| * | Support quiete mode to suppress warnings | Suren A. Chilingaryan | 2011-04-13 | 1 | -2/+14 | |
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| * | clean up | Suren A. Chilingaryan | 2011-04-12 | 1 | -1/+1 | |
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| * | Prototype of IPECamera image protocol | Suren A. Chilingaryan | 2011-04-12 | 1 | -6/+8 | |
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| * | Infrastructure for event API | Suren A. Chilingaryan | 2011-04-12 | 1 | -8/+84 | |
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| * | Support memset operation | Suren A. Chilingaryan | 2011-04-06 | 1 | -4/+22 | |
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| * | Fix exiting on warnings | Suren A. Chilingaryan | 2011-03-25 | 1 | -1/+1 | |
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| * | Set warning handler | Matthias Vogelgesang | 2011-03-14 | 1 | -1/+1 | |
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| * | Suppress warning | Suren A. Chilingaryan | 2011-03-11 | 1 | -1/+1 | |
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| * | Provide single header for library | Suren A. Chilingaryan | 2011-03-09 | 1 | -1/+1 | |
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| * | Support for FPGA registers | Suren A. Chilingaryan | 2011-03-09 | 1 | -8/+9 | |
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| * | Support writting and reading of register ranges | Suren A. Chilingaryan | 2011-03-09 | 1 | -3/+69 | |
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| * | Fixes write verification failure if byte-swapping is in force | Suren A. Chilingaryan | 2011-03-09 | 1 | -1/+1 | |
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| * | Better handling of register banks | Suren A. Chilingaryan | 2011-03-09 | 1 | -23/+83 | |
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| * | Initial support of IPECamera protocol | Suren A. Chilingaryan | 2011-03-08 | 1 | -80/+118 | |
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| * | Write LSB first and fix memory allocation bug | Matthias Vogelgesang | 2011-03-01 | 1 | -2/+5 | |
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| * | Initial support for registers, infrastructure only | Suren A. Chilingaryan | 2011-02-18 | 1 | -0/+579 | |
