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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-1/+4
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-091-7/+7
| | | | (bitmasks), list NWL DMA registers
* Compilation fixSuren A. Chilingaryan2011-07-061-4/+4
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* A bit of renamingSuren A. Chilingaryan2011-07-061-20/+16
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* Include type in the register descriptionSuren A. Chilingaryan2011-07-061-1/+2
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* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-22/+9
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* North West Logick DMA implementationroot2011-07-041-9/+24
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* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-1/+2
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* Enumerate DMA enginesroot2011-06-171-4/+9
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* A bit of DMA infrastructureroot2011-06-161-1/+34
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* Move to new FPGA designroot2011-06-161-3/+11
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* Introduce pcilib_context_t type instead pointer to voidSuren A. Chilingaryan2011-04-141-10/+11
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* Accept timeout parameter to get_next_event callSuren A. Chilingaryan2011-04-141-2/+2
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* Support non-callback way of getting eventsSuren A. Chilingaryan2011-04-141-1/+5
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* Allow access to implementation context and provide call to set size of ↵Suren A. Chilingaryan2011-04-121-0/+1
| | | | internal buffer for IPECamera
* Prototype of IPECamera image protocolSuren A. Chilingaryan2011-04-121-3/+20
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* Infrastructure for event APISuren A. Chilingaryan2011-04-121-2/+57
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* Set warning handlerMatthias Vogelgesang2011-03-141-1/+1
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* Move model decription to public headerSuren A. Chilingaryan2011-03-111-0/+4
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* Provide single header for librarySuren A. Chilingaryan2011-03-091-0/+126