Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | 2011-07-06 | 1 | -0/+2 |
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* | North West Logick DMA implementation | root | 2011-07-04 | 1 | -0/+2 |
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* | clean up | Suren A. Chilingaryan | 2011-04-12 | 1 | -1/+1 |
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* | Support for FPGA registers | Suren A. Chilingaryan | 2011-03-09 | 1 | -0/+3 |
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* | Initial support of IPECamera protocol | Suren A. Chilingaryan | 2011-03-08 | 1 | -4/+16 |
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* | Initial support for registers, infrastructure only | Suren A. Chilingaryan | 2011-02-18 | 1 | -1/+4 |
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* | Print a bit more details | Suren A. Chilingaryan | 2011-02-13 | 1 | -0/+1 |
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* | Initial import | Suren A. Chilingaryan | 2011-02-13 | 1 | -0/+5 |