From b5eac3af41cb8c752b6779dd36c314f8f6caeccf Mon Sep 17 00:00:00 2001
From: "Suren A. Chilingaryan" <csa@dside.dyndns.org>
Date: Wed, 13 Apr 2011 20:01:27 +0200
Subject: Really fix setting registers with access mode equal to 32 (size of
 pcilib_register_value_t)

---
 pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/pci.c b/pci.c
index 5fae55c..a3f09db 100644
--- a/pci.c
+++ b/pci.c
@@ -604,8 +604,8 @@ int pcilib_write_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_reg
 	pcilib_error("Big-endian byte order support is not implemented");
 	return PCILIB_ERROR_NOTSUPPORTED;
     } else {
-	if (b->access == sizeof(res) * 8) {
-	    buf[i] = res;
+	if (b->access == sizeof(pcilib_register_value_t) * 8) {
+	    buf[0] = value;
 	} else {
 	    for (i = 0, res = value; (res > 0)&&(i <= n); ++i) {
 		buf[i] = res & BIT_MASK(b->access);
-- 
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