Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Support dynamic registers, support register offsets and multiregisters ↵ | Suren A. Chilingaryan | 2011-07-09 | 1 | -6/+6 |
| | | | | (bitmasks), list NWL DMA registers | ||||
* | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | 2011-07-06 | 1 | -2/+0 |
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* | Move to new FPGA design | root | 2011-06-16 | 1 | -2/+3 |
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* | 32 bit fix | Suren A. Chilingaryan | 2011-06-07 | 1 | -1/+1 |
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* | Support for FPGA registers | Suren A. Chilingaryan | 2011-03-09 | 1 | -0/+39 |