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* Few fixesSuren A. Chilingaryan2011-07-121-5/+21
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* Fix compilation issuesSuren A. Chilingaryan2011-07-111-5/+5
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* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-114-128/+171
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* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-113-321/+335
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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-117-129/+244
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-092-8/+161
| | | | (bitmasks), list NWL DMA registers
* Add some check to verify if NWL DMA engine have been successfully initializedSuren A. Chilingaryan2011-07-081-5/+3
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* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-061-1/+1
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* A bit of renamingSuren A. Chilingaryan2011-07-062-12/+12
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* Define addresses of NWL enginesroot2011-07-041-1/+3
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* North West Logick DMA implementationroot2011-07-043-104/+711
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* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-182-1/+102
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* Enumerate DMA enginesroot2011-06-172-0/+208