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Suren A. Chilingaryan
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dma
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Author
Age
Files
Lines
...
*
Correctly check if DMA is already enabled
Suren A. Chilingaryan
2011-07-17
1
-1
/
+1
*
Do not try to verify write-only registers
Suren A. Chilingaryan
2011-07-17
1
-1
/
+1
*
Few more fixes
Suren A. Chilingaryan
2011-07-17
3
-8
/
+21
*
Correctly detect the tail pointer of C2S ring
Suren A. Chilingaryan
2011-07-17
4
-34
/
+19
*
Stop only started engines
Suren A. Chilingaryan
2011-07-17
1
-3
/
+18
*
Handle correctly reference counting in the driver
Suren A. Chilingaryan
2011-07-17
2
-11
/
+13
*
Few fixes
Suren A. Chilingaryan
2011-07-17
2
-6
/
+15
*
Implement DMA access synchronization for NWL implementation
Suren A. Chilingaryan
2011-07-17
5
-87
/
+204
*
Implement DMA access synchronization in the driver
Suren A. Chilingaryan
2011-07-16
2
-3
/
+6
*
First iteration of work to preserve DMA state between executions
Suren A. Chilingaryan
2011-07-14
6
-201
/
+228
*
Support modifications of DMA engine and allow DMA customizations by Event engine
Suren A. Chilingaryan
2011-07-14
5
-89
/
+89
*
Few fixes
Suren A. Chilingaryan
2011-07-12
2
-7
/
+18
*
Separate NWL loopback code, provide DMA start/stop interfaces
Suren A. Chilingaryan
2011-07-12
8
-77
/
+136
*
Another reorganization of NWL sources
Suren A. Chilingaryan
2011-07-12
6
-285
/
+301
*
Provide IRQ enable/disable call
Suren A. Chilingaryan
2011-07-12
5
-18
/
+121
*
Suppport DMA modes in console application (not functional yet)
Suren A. Chilingaryan
2011-07-12
4
-12
/
+17
*
Few fixes
Suren A. Chilingaryan
2011-07-12
1
-5
/
+21
*
Fix compilation issues
Suren A. Chilingaryan
2011-07-11
1
-5
/
+5
*
Reorganization of NWL engine, step 1
Suren A. Chilingaryan
2011-07-11
4
-128
/
+171
*
Wait for the completion of DMA operations during writes
Suren A. Chilingaryan
2011-07-11
3
-321
/
+335
*
IRQ support in NWL DMA engine
Suren A. Chilingaryan
2011-07-11
7
-129
/
+244
*
Support dynamic registers, support register offsets and multiregisters (bitma...
Suren A. Chilingaryan
2011-07-09
2
-8
/
+161
*
Add some check to verify if NWL DMA engine have been successfully initialized
Suren A. Chilingaryan
2011-07-08
1
-5
/
+3
*
Support alignments in kmem allocation
Suren A. Chilingaryan
2011-07-06
1
-1
/
+1
*
A bit of renaming
Suren A. Chilingaryan
2011-07-06
2
-12
/
+12
*
Define addresses of NWL engines
root
2011-07-04
1
-1
/
+3
*
North West Logick DMA implementation
root
2011-07-04
3
-104
/
+711
*
DMA engine initialization and basic intrastructure for DMA read/write
root
2011-06-18
2
-1
/
+102
*
Enumerate DMA engines
root
2011-06-17
2
-0
/
+208
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