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* Several fixes in IPEDMA driver and its benchmarking codeSuren A. Chilingaryan2015-02-032-6/+72
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* Add delays to workaround problems in IPEDMA. Also provide other ↵Suren A. Chilingaryan2015-01-252-9/+22
| | | | modifications to reflect minor changes in hardware
* Initial implementation of IPEDMA, dummy driver for KAPTURE, start of API changesSuren A. Chilingaryan2014-12-1914-110/+665
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* Do not return DMA buffer in streaming read if the callback returns errorSuren A. Chilingaryan2012-10-291-1/+1
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* Fixes 2 bugs in NWL DMA initalization: DMA engine was not restarted in case ↵Suren A. Chilingaryan2012-10-221-3/+8
| | | | of incosistency leading to possibility of data loss on DMA; Persistent mode was not respected after re-initalization (stop/start dma)
* Decrease size of DMA buffer (bigger sizes limit DMA bandwidth)Suren A. Chilingaryan2012-10-201-1/+1
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* Increase default size of DMA buffer to accept a full UFO5 frameSuren A. Chilingaryan2012-07-051-1/+1
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* Fix pcitool.h includesSuren A. Chilingaryan2012-07-041-1/+1
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* Reverts r99 and fixes inheritance of kernel buffers properlySuren A. Chilingaryan2011-12-121-2/+2
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* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-128-26/+29
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* new event architecture, first trialSuren A. Chilingaryan2011-12-081-11/+13
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* Improvements of DMA engineSuren A. Chilingaryan2011-10-2610-153/+139
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* Fix DMA synchronization for writes as wellSuren A. Chilingaryan2011-10-241-0/+3
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* Do not sync to device, looks like it is not requiredSuren A. Chilingaryan2011-10-231-1/+2
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* Sync only required buffersSuren A. Chilingaryan2011-10-232-16/+2
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* Properly perform synchronization of DMA buffersSuren A. Chilingaryan2011-10-232-4/+8
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* Precisely estimate used buffers for C2S enginesSuren A. Chilingaryan2011-10-221-5/+58
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* Provide information about active DMA engines & buffersSuren A. Chilingaryan2011-10-222-0/+37
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* Fix bug causing failures of NWL engine to inherit kernel buffersroot2011-10-191-1/+5
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* Disable debuggingroot2011-07-271-1/+1
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* Few fixes in IPE Camera coderoot2011-07-271-2/+2
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* Few fixes for IPE Camera modificationSuren A. Chilingaryan2011-07-191-31/+34
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* IRQ acknowledgement support in the engine APISuren A. Chilingaryan2011-07-183-18/+21
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* Correctly check if DMA is already enabledSuren A. Chilingaryan2011-07-171-1/+1
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* Do not try to verify write-only registersSuren A. Chilingaryan2011-07-171-1/+1
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* Few more fixesSuren A. Chilingaryan2011-07-173-8/+21
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* Correctly detect the tail pointer of C2S ringSuren A. Chilingaryan2011-07-174-34/+19
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* Stop only started enginesSuren A. Chilingaryan2011-07-171-3/+18
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* Handle correctly reference counting in the driverSuren A. Chilingaryan2011-07-172-11/+13
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* Few fixesSuren A. Chilingaryan2011-07-172-6/+15
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* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-175-87/+204
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* Implement DMA access synchronization in the driverSuren A. Chilingaryan2011-07-162-3/+6
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* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-146-201/+228
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* Support modifications of DMA engine and allow DMA customizations by Event engineSuren A. Chilingaryan2011-07-145-89/+89
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* Few fixesSuren A. Chilingaryan2011-07-122-7/+18
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* Separate NWL loopback code, provide DMA start/stop interfacesSuren A. Chilingaryan2011-07-128-77/+136
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* Another reorganization of NWL sourcesSuren A. Chilingaryan2011-07-126-285/+301
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* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-125-18/+121
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* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-124-12/+17
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* Few fixesSuren A. Chilingaryan2011-07-121-5/+21
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* Fix compilation issuesSuren A. Chilingaryan2011-07-111-5/+5
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* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-114-128/+171
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* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-113-321/+335
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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-117-129/+244
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-092-8/+161
| | | | (bitmasks), list NWL DMA registers
* Add some check to verify if NWL DMA engine have been successfully initializedSuren A. Chilingaryan2011-07-081-5/+3
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* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-061-1/+1
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* A bit of renamingSuren A. Chilingaryan2011-07-062-12/+12
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* Define addresses of NWL enginesroot2011-07-041-1/+3
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* North West Logick DMA implementationroot2011-07-043-104/+711
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