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* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-121-2/+2
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-091-6/+7
| | | | (bitmasks), list NWL DMA registers
* Move to new FPGA designroot2011-06-161-4/+4
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* Alternative way to overcome problem with address verification of CMOSIS ↵Suren A. Chilingaryan2011-04-141-24/+26
| | | | registers
* Support simplified mode (slow) of writting CMOSIS sensors: issue 3 writes + ↵Suren A. Chilingaryan2011-04-131-23/+84
| | | | delays and when start looking for status
* Infrastructure for event APISuren A. Chilingaryan2011-04-121-0/+147