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* 1. Add python thread initialization to pcilib_init_py()Vasilii Chernov2016-02-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | -Fix pcilib_script_run_func() work in multithread mode 2. pcilib_close() - Move free_py() code after free views to make view destructors work properly 3. Move script hash to pcilib_py_s 4. Move pcilib_get_logger() pcilib_get_logger_min_prio() and pcilib_get_logger_argument() declarations to error.h 5. Refactor pcilib_get_value_as_pyobject pcilib_set_value_from_pyobject to more unified form 6. Add more memory checks. Fix some string memory allocations. 7. Refactor pcilib_py_s member names. 8. Merge pcilib_script_read() and pcilib_script_write() to pcilib_script_run_func() 9. Update test_pywrap views scripts
* Move python module init code to transfom view constructorVasilii Chernov2016-02-121-1/+2
| | | | | Update python logger and python exeption messages Change serialization method in create_pcilib_instance set_pcilib functions
* 1. Cmakelists - move copy xml folder command to root fileVasilii Chernov2016-02-121-7/+7
| | | | | | | | | | | | | | | | | 2. - Move set python paths code to python module init funtction - pci.c move python module init block code after checking model to get paths before it runs. - Fix set python path code to work with PYTHONPATH - Update pci run script to work with PYTHONPATH - Fix python finalize code 3. Change pcilib_script_s interacting method. Now it stores in hash. 4. Change names of some fucntions to more unified ones 5. Remove old unused function pcilib_xml_create_script_or_transform_view 6. cli - disable reading register after set if write_verification flag is off 7. Remove uninformative error messages fro Python wrap. 8. - Server.py - add read/write property/register command handling - Add help message - Correcting paths
* Support setting payload sizeSuren A. Chilingaryan2015-11-191-0/+7
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* Driver versioningSuren A. Chilingaryan2015-11-191-2/+47
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* Enforce 64-bit dma mask from IPEDMA if supportedSuren A. Chilingaryan2015-11-181-0/+7
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* Documentation updateSuren A. Chilingaryan2015-10-221-121/+3
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* Support properties of arbitrary typeSuren A. Chilingaryan2015-10-181-4/+4
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* Introduce hashesSuren A. Chilingaryan2015-10-091-14/+11
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* Base functions for viewsSuren A. Chilingaryan2015-10-081-2/+10
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* Finalyze XML support and provide initial support for views (only ↵Suren A. Chilingaryan2015-09-241-10/+35
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| * cleaningnicolas.zilio@hotmail.fr2015-09-151-7/+1
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| * first try with pcilib_operation_tnicolas.zilio@hotmail.fr2015-09-141-3/+4
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| * views working fine, units in progressnicolas.zilio@hotmail.fr2015-09-141-4/+10
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| * more towards viewsnicolas.zilio@hotmail.fr2015-09-111-0/+12
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* Initial integration of XML supportSuren A. Chilingaryan2015-09-101-9/+26
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| * further modificationszilio nicolas2015-09-071-1/+9
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| * end of modificationszilio nicolas2015-09-041-9/+1
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| * almost finished regarding suren remarkszilio nicolas2015-09-041-0/+1
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* | Fixes out-of-source builds and minor build issuesSuren A. Chilingaryan2015-09-011-0/+1
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| * almost finished regarding suren remarkszilio nicolas2015-09-041-5/+1
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| * xml files get by model and remove of validation modezilio nicolas2015-08-271-11/+6
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| * better public API and no more use of locals within pcilib_openzilio nicolas2015-08-271-22/+2
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| * put xml nodes pointers for banks and registers in pcilib_t, compil okzilio nicolas2015-08-271-4/+4
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| * pull from serverzilio nicolas2015-08-261-6/+38
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* | Do not fail if PCI configuration is not fully available to unprivileged userSuren A. Chilingaryan2015-08-121-3/+8
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* | Protect access to the DMA engine with locksSuren A. Chilingaryan2015-08-061-0/+8
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* | Read model from environmental variable if definedSuren A. Chilingaryan2015-08-051-0/+3
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* | Integrate locking subsystem from Nicolas ZilioSuren A. Chilingaryan2015-08-051-3/+19
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| * | clean version for lockszilio nicolas2015-07-071-0/+8
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| * some modifzilio nicolas2015-07-071-0/+7
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| * modified pci to put banks before registerszilio nicolas2015-07-031-5/+5
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| * registers and banks support in xml v1. pci -ll works fine, but got segfault ↵zilio nicolas2015-07-011-0/+33
|/ | | | on pci -r name and pci -r name gives 0 always. might be due to the order in pci.c ------> ask suren
* Provide PCIe link information in pcilibSuren A. Chilingaryan2015-05-071-2/+110
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* Split bar manipulation and fifo operations in stand-alone source and publish ↵Suren A. Chilingaryan2015-05-051-209/+7
| | | | kmem and bar headers
* Prevent double-free of pcilib context when open failsSuren A. Chilingaryan2015-05-031-4/+0
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* Create dummy register contextSuren A. Chilingaryan2015-04-291-5/+8
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* Report selected modelSuren A. Chilingaryan2015-04-281-1/+4
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* Initial support for event enginesSuren A. Chilingaryan2015-04-281-25/+48
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* More structural changes to get ready for stand-alone event enginesSuren A. Chilingaryan2015-04-241-0/+540
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