From 3bb43f1260ec30e919d11a554ab4e0d29dd9312e Mon Sep 17 00:00:00 2001 From: Vasilii Chernov Date: Fri, 19 Feb 2016 12:08:10 +0100 Subject: 1. Fix warnings in test_multithread app 2. Fix memory leak in transform view 3. Enchance test_pcipywrap with command line parsing --- apps/test_multithread.c | 6 +- pcilib/py.c | 30 +++++++--- pywrap/pcipywrap.i | 2 +- pywrap/test_pcipywrap.py | 144 ++++++++++++++++++++++++++++++++++++++--------- views/transform.c | 3 +- 5 files changed, 145 insertions(+), 40 deletions(-) diff --git a/apps/test_multithread.c b/apps/test_multithread.c index cad4cd9..19026cc 100644 --- a/apps/test_multithread.c +++ b/apps/test_multithread.c @@ -28,7 +28,7 @@ void *get_prop(void *arg) printf("err pcilib_get_value_as_int\n"); return NULL; } - printf("reg = %i\n", value); + printf("reg = %lu\n", value); } return NULL; } @@ -63,7 +63,7 @@ void *read_reg(void *arg) printf("err pcilib_get_value_as_int\n"); return NULL; } - printf("reg = %i\n", value); + printf("reg = %lu\n", value); } return NULL; } @@ -79,8 +79,6 @@ int main(int argc, char *argv[]) int threads = atoi( argv[4] ); pcilib_t *ctx = pcilib_open(argv[1], argv[2]); - int err; - pcilib_value_t val = {0}; for(int i = 0; i < threads; i++) { diff --git a/pcilib/py.c b/pcilib/py.c index a288043..ea7e6d7 100644 --- a/pcilib/py.c +++ b/pcilib/py.c @@ -3,7 +3,6 @@ #endif #include -#include #include #include @@ -67,11 +66,13 @@ int pcilib_init_py(pcilib_t *ctx) { } PyObject* mod_name = PyString_FromString("Pcipywrap"); + PyObject* py_ctx = PyCObject_FromVoidPtr(ctx, NULL); ctx->py->pcilib_pywrap = PyObject_CallMethodObjArgs(py_script_module, mod_name, - PyCObject_FromVoidPtr(ctx, NULL), + py_ctx, NULL); Py_XDECREF(mod_name); + Py_XDECREF(py_ctx); if(!ctx->py->pcilib_pywrap) { @@ -93,17 +94,25 @@ int pcilib_py_add_script_dir(pcilib_t *ctx) if(!model_dir_added) { char* model_dir = getenv("PCILIB_MODEL_DIR"); + if(!model_dir) + { + pcilib_error("Enviroment variable PCILIB_MODEL_DIR not set."); + return PCILIB_ERROR_NOTINITIALIZED; + } char* model_path = malloc(strlen(model_dir) + strlen(ctx->model) + 2); if (!model_path) return PCILIB_ERROR_MEMORY; sprintf(model_path, "%s/%s", model_dir, ctx->model); //add path to python PyObject* path = PySys_GetObject("path"); - if(PyList_Append(path, PyString_FromString(model_path)) == -1) + PyObject* py_model_path = PyString_FromString(model_path); + if(PyList_Append(path, py_model_path) == -1) { + Py_XDECREF(py_model_path); pcilib_error("Cant set PCILIB_MODEL_DIR library path to python."); free(model_path); return PCILIB_ERROR_FAILED; } + Py_XDECREF(py_model_path); free(model_path); model_dir_added = 1; } @@ -119,7 +128,8 @@ void pcilib_free_py(pcilib_t *ctx) { if(ctx->py->py_initialized_inside) py_initialized_inside = 1; - // Dict and module references are borrowed + // Dict and module references are borrowed + Py_XDECREF(ctx->py->pcilib_pywrap); free(ctx->py); ctx->py = NULL; } @@ -434,10 +444,14 @@ pcilib_access_mode_t *mode) PyObject* dict = PyModule_GetDict(module->module); //Setting correct mode mode[0] = 0; - if(PyDict_Contains(dict, PyString_FromString("read_from_register"))) - mode[0] |= PCILIB_ACCESS_R; - if(PyDict_Contains(dict, PyString_FromString("write_to_register"))) - mode[0] |= PCILIB_ACCESS_W; + PyObject* py_read_from_register = PyString_FromString("read_from_register"); + if(PyDict_Contains(dict, py_read_from_register)) + mode[0] |= PCILIB_ACCESS_R; + Py_XDECREF(py_read_from_register); + PyObject* py_write_to_register = PyString_FromString("write_to_register"); + if(PyDict_Contains(dict, py_write_to_register)) + mode[0] |= PCILIB_ACCESS_W; + Py_XDECREF(py_write_to_register); return 0; #else mode[0] = PCILIB_ACCESS_RW; diff --git a/pywrap/pcipywrap.i b/pywrap/pcipywrap.i index 88a746f..ac8e9ca 100644 --- a/pywrap/pcipywrap.i +++ b/pywrap/pcipywrap.i @@ -8,7 +8,7 @@ extern void __redirect_logs_to_exeption(); typedef struct { %extend { - Pcipywrap(const char* fpga_device = NULL, const char* model = NULL); + Pcipywrap(const char* fpga_device = "/dev/fpga0", const char* model = NULL); Pcipywrap(PyObject* ctx){return create_Pcipywrap(ctx);} ~Pcipywrap(); diff --git a/pywrap/test_pcipywrap.py b/pywrap/test_pcipywrap.py index 257b4a5..d0c4ae6 100755 --- a/pywrap/test_pcipywrap.py +++ b/pywrap/test_pcipywrap.py @@ -5,12 +5,20 @@ import os import json import requests import time +from optparse import OptionParser, OptionGroup class test_pcipywrap(): - def __init__(self, device, model, num_threads = 150, - write_percentage = 0.1, register = 'test_prop2', - server_host = 'http://localhost', server_port = 12412, - server_message_delay = 0): + def __init__(self, + device, + model, + num_threads = 150, + write_percentage = 0.1, + register = 'reg1', + prop = '/test/prop1', + branch = '/test', + server_host = 'http://localhost', + server_port = 12412, + server_message_delay = 0): #initialize enviroment variables if not 'APP_PATH' in os.environ: APP_PATH = '' @@ -25,10 +33,14 @@ class test_pcipywrap(): random.seed() #create pcilib_instance + self.device = device + self.model = model self.pcilib = pcipywrap.Pcipywrap(device, model) self.num_threads = num_threads self.write_percentage = write_percentage self.register = register + self.prop = prop + self.branch = branch self.server_message_delay = server_message_delay self.server_port = server_port self.server_host = server_host @@ -36,13 +48,13 @@ class test_pcipywrap(): def testThreadSafeReadWrite(self): def threadFunc(): if random.randint(0, 100) >= (self.write_percentage * 100): - ret = self.pcilib.get_property('/test/prop2') + ret = self.pcilib.get_property(self.prop) print self.register, ':', ret del ret else: val = random.randint(0, 65536) print 'set value:', val - self.pcilib.write_register(val, self.register) + self.pcilib.set_property(val, self.prop) try: while(1): thread_list = [threading.Thread(target=threadFunc) for i in range(0, self.num_threads)] @@ -58,17 +70,17 @@ class test_pcipywrap(): def testMemoryLeak(self): try: while(1): - #print self.pcilib.create_pcilib_instance('/dev/fpga0','test_pywrap') - - print self.pcilib.get_property_list('/test') - print self.pcilib.get_register_info('test_prop1') - #print self.pcilib.get_registers_list(); + val = random.randint(0, 8096) + self.pcilib = pcipywrap.Pcipywrap(self.device, self.model) + print self.pcilib.get_property_list(self.branch) + print self.pcilib.get_register_info(self.register) + print self.pcilib.get_registers_list(); - #print self.pcilib.read_register('reg1') - #print self.pcilib.write_register(12, 'reg1') + print self.pcilib.read_register(self.register) + print self.pcilib.write_register(val, self.register) - #print self.pcilib.get_property('/test/prop2') - #print self.pcilib.set_property(12, '/test/prop2') + print self.pcilib.get_property(self.prop) + print self.pcilib.set_property(val, self.prop) except KeyboardInterrupt: print 'testing done' pass @@ -80,17 +92,17 @@ class test_pcipywrap(): #{'command': 'open', 'device' : '/dev/fpga0', 'model': 'test_pywrap'}, {'command': 'help'}, {'command': 'get_registers_list'}, - {'command': 'get_register_info', 'reg': 'reg1'}, - {'command': 'get_property_list'}, - {'command': 'read_register', 'reg': 'reg1'}, - {'command': 'write_register', 'reg': 'reg1'}, - {'command': 'get_property', 'prop': '/test/prop2'}, - {'command': 'set_property', 'prop': '/test/prop2'}] + {'command': 'get_register_info', 'reg': self.register}, + {'command': 'get_property_list', 'branch': self.branch}, + {'command': 'read_register', 'reg': self.register}, + {'command': 'write_register', 'reg': self.register}, + {'command': 'get_property', 'prop': self.prop}, + {'command': 'set_property', 'prop': self.prop}] def sendRandomMessage(): message_number = random.randint(1, len(payload) - 1) print 'message number: ', message_number - payload[message_number]['value'] = random.randint(0, 65535) + payload[message_number]['value'] = random.randint(0, 8096) r = requests.get(url, data=json.dumps(payload[message_number]), headers=headers) print json.dumps(r.json(), sort_keys=True, indent=4, separators=(',', ': ')) @@ -112,8 +124,88 @@ class test_pcipywrap(): pass if __name__ == '__main__': - lib = test_pcipywrap('/dev/fpga0','test_pywrap', num_threads = 150, - write_percentage = 0.1, register = 'test_prop2',server_host = 'http://localhost', server_port = 12412, - server_message_delay = 0) - lib.testThreadSafeReadWrite() + #parce command line options + parser = OptionParser() + parser.add_option("-d", "--device", action="store", + type="string", dest="device", default=str('/dev/fpga0'), + help="FPGA device (/dev/fpga0)") + parser.add_option("-m", "--model", action="store", + type="string", dest="model", default=None, + help="Memory model (autodetected)") + parser.add_option("-t", "--threads", action="store", + type="int", dest="threads", default=150, + help="Threads number (150)") + + server_group = OptionGroup(parser, "Server Options", + "Options for testing server.") + server_group.add_option("-p", "--port", action="store", + type="int", dest="port", default=9000, + help="Set testing server port (9000)") + server_group.add_option("--host", action="store", + type="string", dest="host", default='http://localhost', + help="Set testing server host (http://localhost)") + server_group.add_option("--delay", action="store", + type="float", dest="delay", default=0.0, + help="Set delay in seconds between sending messages to setver (0.0)") + parser.add_option_group(server_group) + + rw_group = OptionGroup(parser, "Registers/properties Options", + "Group stores testing register and property options") + rw_group.add_option("--write_percentage", action="store", + type="float", dest="write_percentage", default=0.5, + help="Set percentage (0.0 - 1.0) of write commands in multithread (0.5)" + "read/write test") + rw_group.add_option("-r", "--register", action="store", + type="string", dest="register", default='reg1', + help="Set register name (reg1)") + rw_group.add_option("--property", action="store", + type="string", dest="prop", default='/test/prop1', + help="Set property name (/test/prop1)") + rw_group.add_option("-b", "--branch", action="store", + type="string", dest="branch", default='/test', + help="Set property branch (/test)") + + parser.add_option_group(rw_group) + + test_group = OptionGroup(parser, "Test commands group", + "This group conatains aviable commands for testing. " + "If user add more than one command, they will process" + "sequientally. To stop test, press Ctrl-C." + ) + test_group.add_option("--test_mt_rw", action="store_true", + dest="test_mt_rw", default=False, + help="Multithread read/write test. This test will execute " + "get_property/set_property commands with random values in multi-thread mode") + test_group.add_option("--test_memory_leak", action="store_true", + dest="test_memory_leak", default=False, + help="Python wrap memory leak test. This test will execute all" + "Python wrap memory leak test. This test will execute all" + ) + test_group.add_option("--test_server", action="store_true", + dest="test_server", default=False, + help="Python server test. This test will send " + "random commands to server in multi-thread mode" + ) + parser.add_option_group(test_group) + opts = parser.parse_args()[0] + + #create pcilib test instance + lib = test_pcipywrap(opts.device, + opts.model, + num_threads = opts.threads, + write_percentage = opts.write_percentage, + register = opts.register, + prop = opts.prop, + branch = opts.branch, + server_host = opts.host, + server_port = opts.port, + server_message_delay = opts.delay) + + #make some tests + if opts.test_mt_rw: + lib.testThreadSafeReadWrite() + if opts.test_memory_leak: + lib.testMemoryLeak() + if opts.test_server: + lib.testServer() diff --git a/views/transform.c b/views/transform.c index eb3572a..02edddf 100644 --- a/views/transform.c +++ b/views/transform.c @@ -11,7 +11,6 @@ #include "py.h" #include "error.h" - static int pcilib_transform_view_read(pcilib_t *ctx, pcilib_view_context_t *view_ctx, pcilib_register_value_t regval, pcilib_value_t *val) { const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx); pcilib_transform_view_description_t *v = (pcilib_transform_view_description_t*)(model_info->views[view_ctx->view]); @@ -58,6 +57,8 @@ void pcilib_transform_view_free_description (pcilib_t *ctx, pcilib_view_descript if(v->module) pcilib_py_free_script(ctx, v->module); + + free(v); } pcilib_view_context_t * pcilib_transform_view_init(pcilib_t *ctx, const pcilib_view_description_t *desc) -- cgit v1.2.3