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authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-17 23:10:20 +0200
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-17 23:10:20 +0200
commit268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193 (patch)
treed7803ceac0ed5b5dd3ccea2a476de042fd44081f
parentad4a1e15877aff3da889c0c433475d3173a677e4 (diff)
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Do not try to verify write-only registers
-rw-r--r--cli.c25
-rw-r--r--dma/nwl_register.h2
2 files changed, 16 insertions, 11 deletions
diff --git a/cli.c b/cli.c
index de796dc..d9b27be 100644
--- a/cli.c
+++ b/cli.c
@@ -822,12 +822,13 @@ int WriteRegister(pcilib_t *handle, pcilib_model_description_t *model_info, cons
const char *format;
+ pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
+ if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
+
/*
pcilib_register_bank_t bank_id;
pcilib_register_bank_addr_t bank_addr;
- pcilib_register_t regid = pcilib_find_register(handle, bank, reg);
- if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");
bank_id = pcilib_find_bank_by_addr(handle, model_info->registers[regid].bank);
if (bank_id == PCILIB_REGISTER_BANK_INVALID) Error("Can't find bank of the register (%s)", reg);
format = model_info->banks[bank_id].format;
@@ -855,15 +856,19 @@ int WriteRegister(pcilib_t *handle, pcilib_model_description_t *model_info, cons
err = pcilib_write_register(handle, bank, reg, value);
if (err) Error("Error writting register %s\n", reg);
- err = pcilib_read_register(handle, bank, reg, &value);
- if (err) Error("Error reading back register %s for verification\n", reg);
-
- if (val != value) {
- Error("Failed to write register %s: %lu is written and %lu is read back", reg, val, value);
+ if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) {
+ err = pcilib_read_register(handle, bank, reg, &value);
+ if (err) Error("Error reading back register %s for verification\n", reg);
+
+ if (val != value) {
+ Error("Failed to write register %s: %lu is written and %lu is read back", reg, val, value);
+ } else {
+ printf("%s = ", reg);
+ printf(format, value);
+ printf("\n");
+ }
} else {
- printf("%s = ", reg);
- printf(format, value);
- printf("\n");
+ printf("%s is written\n ", reg);
}
return 0;
diff --git a/dma/nwl_register.h b/dma/nwl_register.h
index 926f093..89a8632 100644
--- a/dma/nwl_register.h
+++ b/dma/nwl_register.h
@@ -59,7 +59,7 @@ static pcilib_register_description_t nwl_dma_engine_registers[] = {
{0x0004, 10, 1, 0, 0x0000C100, PCILIB_REGISTER_R , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_running", ""},
{0x0004, 11, 1, 0, 0x0000C100, PCILIB_REGISTER_R , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_waiting", ""},
{0x0004, 14, 1, 0, 0x0000C100, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset_request", ""},
- {0x0004, 15, 1, 0, 0x0000C100, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""},
+ {0x0004, 15, 1, 0, 0x0000C100, PCILIB_REGISTER_W , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""},
{0x0008, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_next_descriptor", ""},
{0x000C, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_descriptor", ""},
{0x0010, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_last_descriptor", ""},