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authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-18 16:42:51 +0200
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-18 16:42:51 +0200
commit9e424252a35879f121e7ea4531a9ab3dda56d595 (patch)
tree2cf3dfeceb67eee989a6cc4b20f639baf68748f8 /dma
parente9904116a5b39e47744fb39cc5aad574c8bee03f (diff)
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IRQ acknowledgement support in the engine API
Diffstat (limited to 'dma')
-rw-r--r--dma/nwl_dma.h2
-rw-r--r--dma/nwl_engine.c21
-rw-r--r--dma/nwl_irq.c16
3 files changed, 21 insertions, 18 deletions
diff --git a/dma/nwl_dma.h b/dma/nwl_dma.h
index bdb3df0..d5068e2 100644
--- a/dma/nwl_dma.h
+++ b/dma/nwl_dma.h
@@ -11,6 +11,7 @@ void dma_nwl_free(pcilib_dma_context_t *vctx);
int dma_nwl_enable_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t type, pcilib_dma_flags_t flags);
int dma_nwl_disable_irq(pcilib_dma_context_t *vctx, pcilib_dma_flags_t flags);
+int dma_nwl_acknowledge_irq(pcilib_dma_context_t *ctx, pcilib_irq_type_t irq_type, pcilib_irq_source_t irq_source);
int dma_nwl_start(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
int dma_nwl_stop(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
@@ -26,6 +27,7 @@ pcilib_dma_api_description_t nwl_dma_api = {
dma_nwl_free,
dma_nwl_enable_irq,
dma_nwl_disable_irq,
+ dma_nwl_acknowledge_irq,
dma_nwl_start,
dma_nwl_stop,
dma_nwl_write_fragment,
diff --git a/dma/nwl_engine.c b/dma/nwl_engine.c
index 669dbbd..277ad23 100644
--- a/dma/nwl_engine.c
+++ b/dma/nwl_engine.c
@@ -77,12 +77,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
if (info->reused) {
info->preserve = 1;
- // Acknowledge asserted engine interrupts
- nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
- if (val & DMA_ENG_INT_ACTIVE_MASK) {
- val |= DMA_ENG_ALLINT_MASK;
- nwl_write_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
- }
+ dma_nwl_acknowledge_irq(ctx, PCILIB_DMA_IRQ, dma);
#ifdef NWL_GENERATE_DMA_IRQ
dma_nwl_enable_engine_irq(ctx, dma);
@@ -131,11 +126,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
return PCILIB_ERROR_TIMEOUT;
}
- // Acknowledge asserted engine interrupts
- if (val & DMA_ENG_INT_ACTIVE_MASK) {
- val |= DMA_ENG_ALLINT_MASK;
- nwl_write_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
- }
+ dma_nwl_acknowledge_irq(ctx, PCILIB_DMA_IRQ, dma);
ring_pa = pcilib_kmem_get_pa(ctx->pcilib, info->ring);
nwl_write_register(ring_pa, ctx, info->base_addr, REG_DMA_ENG_NEXT_BD);
@@ -206,12 +197,8 @@ int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
nwl_write_register(ring_pa, ctx, info->base_addr, REG_SW_NEXT_BD);
}
}
-
- // Acknowledge asserted engine interrupts
- if (val & DMA_ENG_INT_ACTIVE_MASK) {
- val |= DMA_ENG_ALLINT_MASK;
- nwl_write_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
- }
+
+ dma_nwl_acknowledge_irq(ctx, PCILIB_DMA_IRQ, dma);
if (info->preserve) {
flags = PCILIB_KMEM_FLAG_REUSE;
diff --git a/dma/nwl_irq.c b/dma/nwl_irq.c
index 86f1845..ae4aacc 100644
--- a/dma/nwl_irq.c
+++ b/dma/nwl_irq.c
@@ -100,6 +100,20 @@ int dma_nwl_disable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
return 0;
}
+int dma_nwl_acknowledge_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t irq_type, pcilib_irq_source_t irq_source) {
+ uint32_t val;
+
+ nwl_dma_t *ctx = (nwl_dma_t*)vctx;
+ pcilib_nwl_engine_description_t *info = ctx->engines + irq_source;
+ if (irq_type != PCILIB_DMA_IRQ) return PCILIB_ERROR_NOTSUPPORTED;
+ if (irq_source >= ctx->n_engines) return PCILIB_ERROR_NOTAVAILABLE;
-// ACK
+ nwl_read_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+ if (val & DMA_ENG_INT_ACTIVE_MASK) {
+ val |= DMA_ENG_ALLINT_MASK;
+ nwl_write_register(val, ctx, info->base_addr, REG_DMA_ENG_CTRL_STATUS);
+ }
+
+ return 0;
+}