summaryrefslogtreecommitdiffstats
path: root/ipecamera.h
diff options
context:
space:
mode:
authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-03-08 22:46:14 +0100
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-03-08 22:46:14 +0100
commit7f97ea07417de4c2ea260e2860e589011c732e04 (patch)
tree5e5dd32f4615a40990f8daf10a96f82f39ca3b83 /ipecamera.h
parent8a33c993a5771b041b67c365378ac40f76365da7 (diff)
downloadipecamera-7f97ea07417de4c2ea260e2860e589011c732e04.tar.gz
ipecamera-7f97ea07417de4c2ea260e2860e589011c732e04.tar.bz2
ipecamera-7f97ea07417de4c2ea260e2860e589011c732e04.tar.xz
ipecamera-7f97ea07417de4c2ea260e2860e589011c732e04.zip
Initial support of IPECamera protocol
Diffstat (limited to 'ipecamera.h')
-rw-r--r--ipecamera.h115
1 files changed, 63 insertions, 52 deletions
diff --git a/ipecamera.h b/ipecamera.h
index 51c99d9..0c5b518 100644
--- a/ipecamera.h
+++ b/ipecamera.h
@@ -6,65 +6,76 @@
#include "pci.h"
#define IPECAMERA_REGISTER_SPACE 0xfeaffc00
-#define IPECAMERA_REGISTER_WRITE (IPECAMERA_REGISTER_SPACE)
-#define IPECAMERA_REGISTER_READ (IPECAMERA_REGISTER_SPACE + 4)
+#define IPECAMERA_REGISTER_WRITE (IPECAMERA_REGISTER_SPACE + 0)
+#define IPECAMERA_REGISTER_READ (IPECAMERA_REGISTER_WRITE + 4)
+
#ifdef _IPECAMERA_C
-pcilib_register_t ipecamera_registers[] = {
-{1, 16, 1088, PCILIB_REGISTER_RW, "number_lines", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{3, 16, 0, PCILIB_REGISTER_RW, "start1", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{5, 16, 0, PCILIB_REGISTER_RW, "start2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{7, 16, 0, PCILIB_REGISTER_RW, "start3", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{9, 16, 0, PCILIB_REGISTER_RW, "start4", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{11, 16, 0, PCILIB_REGISTER_RW, "start5", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{13, 16, 0, PCILIB_REGISTER_RW, "start6", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{15, 16, 0, PCILIB_REGISTER_RW, "start7", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{17, 16, 0, PCILIB_REGISTER_RW, "start8", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{19, 16, 0, PCILIB_REGISTER_RW, "number_lines1", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{21, 16, 0, PCILIB_REGISTER_RW, "number_lines2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{23, 16, 0, PCILIB_REGISTER_RW, "number_lines3", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{25, 16, 0, PCILIB_REGISTER_RW, "number_lines4", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{27, 16, 0, PCILIB_REGISTER_RW, "number_lines5", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{29, 16, 0, PCILIB_REGISTER_RW, "number_lines6", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{31, 16, 0, PCILIB_REGISTER_RW, "number_lines7", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{33, 16, 0, PCILIB_REGISTER_RW, "number_lines8", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{35, 16, 0, PCILIB_REGISTER_RW, "sub_s", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{37, 16, 0, PCILIB_REGISTER_RW, "sub_a", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{39, 1, 1, PCILIB_REGISTER_RW, "color", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{40, 2, 0, PCILIB_REGISTER_RW, "image_flipping", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{41, 2, 0, PCILIB_REGISTER_RW, "exp_flags", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{42, 24, 1088, PCILIB_REGISTER_RW, "exp_time", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{45, 24, 1088, PCILIB_REGISTER_RW, "exp_step", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{48, 24, 1, PCILIB_REGISTER_RW, "exp_kp1", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{51, 24, 1, PCILIB_REGISTER_RW, "exp_kp2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{54, 2, 1, PCILIB_REGISTER_RW, "nr_slopes", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{55, 8, 1, PCILIB_REGISTER_RW, "exp_seq", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{56, 24, 1088, PCILIB_REGISTER_RW, "exp_time2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{59, 24, 1088, PCILIB_REGISTER_RW, "exp_step2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{68, 2, 1, PCILIB_REGISTER_RW, "nr_slopes2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{69, 8, 1, PCILIB_REGISTER_RW, "exp_seq2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{70, 16, 1, PCILIB_REGISTER_RW, "number_frames", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{72, 2, 0, PCILIB_REGISTER_RW, "output_mode", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{78, 12, 85, PCILIB_REGISTER_RW, "training_pattern", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{80, 18, 0x3FFFF,PCILIB_REGISTER_RW, "channel_en", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{89, 8, 96, PCILIB_REGISTER_RW, "vlow2", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{90, 8, 96, PCILIB_REGISTER_RW, "vlow3", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{100, 14, 16260, PCILIB_REGISTER_RW, "offset", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{102, 2, 0, PCILIB_REGISTER_RW, "pga", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{103, 8, 32, PCILIB_REGISTER_RW, "adc_gain", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{111, 1, 1, PCILIB_REGISTER_RW, "bit_mode", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{112, 2, 0, PCILIB_REGISTER_RW, "adc_resolution", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{126, 16, 0, PCILIB_REGISTER_RW, "temp", IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, ""},
-{0, 0, 0, 0, NULL, 0, 0, 0, NULL}
+pcilib_register_bank_description_t ipecamera_register_banks[] = {
+ { PCILIB_REGISTER_BANK0, IPECAMERA_REGISTER_PROTOCOL, IPECAMERA_REGISTER_READ, IPECAMERA_REGISTER_WRITE, PCILIB_BIG_ENDIAN, 8, PCILIB_LITTLE_ENDIAN },
+ { 0, 0, 0, 0, 0 }
+};
+
+pcilib_register_description_t ipecamera_registers[] = {
+{1, 16, 1088, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines", ""},
+{3, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start1", ""},
+{5, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start2", ""},
+{7, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start3", ""},
+{9, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start4", ""},
+{11, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start5", ""},
+{13, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start6", ""},
+{15, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start7", ""},
+{17, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "start8", ""},
+{19, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines1", ""},
+{21, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines2", ""},
+{23, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines3", ""},
+{25, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines4", ""},
+{27, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines5", ""},
+{29, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines6", ""},
+{31, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines7", ""},
+{33, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_lines8", ""},
+{35, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "sub_s", ""},
+{37, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "sub_a", ""},
+{39, 1, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "color", ""},
+{40, 2, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "image_flipping", ""},
+{41, 2, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_flags", ""},
+{42, 24, 1088, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_time", ""},
+{45, 24, 1088, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_step", ""},
+{48, 24, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_kp1", ""},
+{51, 24, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_kp2", ""},
+{54, 2, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "nr_slopes", ""},
+{55, 8, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_seq", ""},
+{56, 24, 1088, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_time2", ""},
+{59, 24, 1088, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_step2", ""},
+{68, 2, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "nr_slopes2", ""},
+{69, 8, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "exp_seq2", ""},
+{70, 16, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "number_frames", ""},
+{72, 2, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "output_mode", ""},
+{78, 12, 85, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "training_pattern", ""},
+{80, 18, 0x3FFFF,PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "channel_en", ""},
+{89, 8, 96, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "vlow2", ""},
+{90, 8, 96, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "vlow3", ""},
+{100, 14, 16260, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "offset", ""},
+{102, 2, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "pga", ""},
+{103, 8, 32, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "adc_gain", ""},
+{111, 1, 1, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "bit_mode", ""},
+{112, 2, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "adc_resolution", ""},
+{126, 16, 0, PCILIB_REGISTER_RW, PCILIB_REGISTER_BANK0, "temp", ""},
+{0, 0, 0, 0, 0, NULL, NULL}
};
-pcilib_register_range_t ipecamera_register_range[] = {
- {0, 128}, {0,0}
+pcilib_register_range_t ipecamera_register_ranges[] = {
+ {0, 128, PCILIB_REGISTER_BANK0}, {0, 0, 0}
};
#else
-extern pcilib_register_t ipecamera_registers[];
-extern pcilib_register_range_t ipecamera_register_range[];
+extern pcilib_register_description_t ipecamera_registers[];
+extern pcilib_register_bank_description_t ipecamera_register_banks[];
+extern pcilib_register_range_t ipecamera_register_ranges[];
#endif
+
+int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t *value);
+int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t value);
+
#endif /* _IPECAMERA_H */