Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Prevent driver holding hardware locks from unloading | Suren A. Chilingaryan | 2011-07-18 | 4 | -12/+59 |
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* | Provide few scripts to test DMA | Suren A. Chilingaryan | 2011-07-17 | 2 | -0/+43 |
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* | Correctly check if DMA is already enabled | Suren A. Chilingaryan | 2011-07-17 | 1 | -1/+1 |
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* | Do not try to verify write-only registers | Suren A. Chilingaryan | 2011-07-17 | 2 | -11/+16 |
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* | Support forceful clean-up of kernel memory | Suren A. Chilingaryan | 2011-07-17 | 6 | -36/+126 |
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* | List kernel buffers | Suren A. Chilingaryan | 2011-07-17 | 5 | -38/+205 |
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* | Few more fixes | Suren A. Chilingaryan | 2011-07-17 | 3 | -8/+21 |
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* | Correctly detect the tail pointer of C2S ring | Suren A. Chilingaryan | 2011-07-17 | 4 | -34/+19 |
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* | Stop only started engines | Suren A. Chilingaryan | 2011-07-17 | 1 | -3/+18 |
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* | Handle correctly reference counting in the driver | Suren A. Chilingaryan | 2011-07-17 | 8 | -28/+52 |
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* | Few fixes | Suren A. Chilingaryan | 2011-07-17 | 6 | -27/+53 |
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* | Implement DMA access synchronization for NWL implementation | Suren A. Chilingaryan | 2011-07-17 | 11 | -137/+311 |
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* | Implement DMA access synchronization in the driver | Suren A. Chilingaryan | 2011-07-16 | 13 | -76/+268 |
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* | Provide formal description of DMA access synchronization | Suren A. Chilingaryan | 2011-07-16 | 2 | -9/+155 |
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* | First iteration of work to preserve DMA state between executions | Suren A. Chilingaryan | 2011-07-14 | 17 | -215/+347 |
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* | Support modifications of DMA engine and allow DMA customizations by Event engine | Suren A. Chilingaryan | 2011-07-14 | 12 | -96/+123 |
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* | Add timeout to pcilib_skip_dma | Suren A. Chilingaryan | 2011-07-14 | 1 | -4/+21 |
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* | Support iterations argument and fix interpretation of size argument for ↵ | Suren A. Chilingaryan | 2011-07-13 | 1 | -6/+14 |
| | | | | benchmarking | ||||
* | Report writted register in hex if it was specified in hex | Suren A. Chilingaryan | 2011-07-12 | 1 | -3/+23 |
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* | Few fixes | Suren A. Chilingaryan | 2011-07-12 | 4 | -14/+34 |
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* | Separate NWL loopback code, provide DMA start/stop interfaces | Suren A. Chilingaryan | 2011-07-12 | 11 | -82/+181 |
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* | Another reorganization of NWL sources | Suren A. Chilingaryan | 2011-07-12 | 7 | -286/+302 |
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* | Provide IRQ enable/disable call | Suren A. Chilingaryan | 2011-07-12 | 10 | -30/+171 |
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* | Suppport DMA modes in console application (not functional yet) | Suren A. Chilingaryan | 2011-07-12 | 12 | -33/+233 |
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* | Few fixes | Suren A. Chilingaryan | 2011-07-12 | 2 | -8/+25 |
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* | Fix compilation issues | Suren A. Chilingaryan | 2011-07-11 | 3 | -8/+8 |
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* | Reorganization of NWL engine, step 1 | Suren A. Chilingaryan | 2011-07-11 | 5 | -128/+176 |
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* | Wait for the completion of DMA operations during writes | Suren A. Chilingaryan | 2011-07-11 | 9 | -349/+431 |
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* | Minor improvement | Suren A. Chilingaryan | 2011-07-11 | 1 | -7/+7 |
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* | Change cli parameters (reserve -t parameter for future use as timeout) | Suren A. Chilingaryan | 2011-07-11 | 1 | -25/+41 |
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* | IRQ support in NWL DMA engine | Suren A. Chilingaryan | 2011-07-11 | 18 | -206/+306 |
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* | Support dynamic registers, support register offsets and multiregisters ↵ | Suren A. Chilingaryan | 2011-07-09 | 16 | -202/+468 |
| | | | | (bitmasks), list NWL DMA registers | ||||
* | Add some check to verify if NWL DMA engine have been successfully initialized | Suren A. Chilingaryan | 2011-07-08 | 1 | -5/+3 |
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* | Support alignments in kmem allocation | Suren A. Chilingaryan | 2011-07-06 | 3 | -12/+21 |
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* | Fix segmentation failure in DMA access mode | Suren A. Chilingaryan | 2011-07-06 | 1 | -1/+5 |
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* | Compilation fix | Suren A. Chilingaryan | 2011-07-06 | 1 | -4/+4 |
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* | A bit of renaming | Suren A. Chilingaryan | 2011-07-06 | 9 | -55/+51 |
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* | Include type in the register description | Suren A. Chilingaryan | 2011-07-06 | 3 | -60/+62 |
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* | Support FIFO reading/writting, code restructurization, few fixes | Suren A. Chilingaryan | 2011-07-06 | 11 | -571/+785 |
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* | Define addresses of NWL engines | root | 2011-07-04 | 1 | -1/+3 |
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* | North West Logick DMA implementation | root | 2011-07-04 | 22 | -227/+1367 |
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* | DMA engine initialization and basic intrastructure for DMA read/write | root | 2011-06-18 | 5 | -27/+189 |
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* | Enumerate DMA engines | root | 2011-06-17 | 9 | -25/+255 |
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* | New reset routine | root | 2011-06-16 | 1 | -3/+3 |
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* | A bit of DMA infrastructure | root | 2011-06-16 | 7 | -24/+126 |
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* | Remove unsupported devices | root | 2011-06-16 | 4 | -83/+8 |
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* | Move to new FPGA design | root | 2011-06-16 | 8 | -82/+179 |
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* | 32 bit fix | Suren A. Chilingaryan | 2011-06-07 | 1 | -1/+1 |
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* | Do not crash if model is not defined | Suren A. Chilingaryan | 2011-05-18 | 1 | -6/+8 |
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* | Some improvements in error handling | Suren A. Chilingaryan | 2011-05-03 | 1 | -12/+40 |
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