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* Increase event timeout for large trigger timesSuren A. Chilingaryan2011-12-121-0/+6
* Declare volatile differentlySuren A. Chilingaryan2011-12-121-9/+8
* Add volatile keyword to prevent problematic optimizationsSuren A. Chilingaryan2011-12-121-8/+10
* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-121-58/+72
* Send proper event id to get_data functionSuren A. Chilingaryan2011-12-091-2/+2
* Image frames decodingSuren A. Chilingaryan2011-12-091-2/+12
* Parse required event & data_typeSuren A. Chilingaryan2011-12-091-7/+48
* Gathering a bit of statisticsSuren A. Chilingaryan2011-12-091-12/+57
* Print proper addresses for register range read/writesSuren A. Chilingaryan2011-12-091-6/+8
* Initial support of event streaming in cliSuren A. Chilingaryan2011-12-091-27/+194
* new event architecture, first trialSuren A. Chilingaryan2011-12-081-19/+255
* Fix allocation of big memory buffers for DMA readout in pcitoolSuren A. Chilingaryan2011-11-281-2/+3
* Improvements of DMA engineSuren A. Chilingaryan2011-10-261-17/+103
* Precisely estimate used buffers for C2S enginesSuren A. Chilingaryan2011-10-221-1/+1
* Provide information about active DMA engines & buffersSuren A. Chilingaryan2011-10-221-7/+245
* Accept short addresses for IPECamera FPGA registersSuren A. Chilingaryan2011-10-211-1/+8
* Remove short option for benchmark in cliroot2011-10-211-3/+3
* Support exporting data from kernel buffersroot2011-10-211-11/+66
* Print propper number of strings in cli in case of DMA readroot2011-07-271-0/+1
* Few fixes for IPE Camera modificationSuren A. Chilingaryan2011-07-191-1/+3
* IRQ acknowledgement support in the engine APISuren A. Chilingaryan2011-07-181-2/+7
* Support writting output to fileSuren A. Chilingaryan2011-07-181-47/+72
* Change timeout definition in Events API from struct timespec to pcilib_timeout_tSuren A. Chilingaryan2011-07-181-1/+1
* Do not try to verify write-only registersSuren A. Chilingaryan2011-07-171-10/+15
* Support forceful clean-up of kernel memorySuren A. Chilingaryan2011-07-171-2/+45
* List kernel buffersSuren A. Chilingaryan2011-07-171-28/+188
* Few fixesSuren A. Chilingaryan2011-07-171-15/+24
* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-171-4/+4
* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-141-1/+2
* Support iterations argument and fix interpretation of size argument for bench...Suren A. Chilingaryan2011-07-131-6/+14
* Report writted register in hex if it was specified in hexSuren A. Chilingaryan2011-07-121-3/+23
* Few fixesSuren A. Chilingaryan2011-07-121-6/+14
* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-121-1/+1
* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-121-9/+151
* Fix compilation issuesSuren A. Chilingaryan2011-07-111-1/+1
* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-111-0/+5
* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-111-4/+4
* Minor improvementSuren A. Chilingaryan2011-07-111-7/+7
* Change cli parameters (reserve -t parameter for future use as timeout)Suren A. Chilingaryan2011-07-111-25/+41
* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-0/+8
* Support dynamic registers, support register offsets and multiregisters (bitma...Suren A. Chilingaryan2011-07-091-37/+53
* Fix segmentation failure in DMA access modeSuren A. Chilingaryan2011-07-061-1/+5
* A bit of renamingSuren A. Chilingaryan2011-07-061-6/+6
* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-54/+179
* North West Logick DMA implementationroot2011-07-041-5/+37
* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-25/+47
* Enumerate DMA enginesroot2011-06-171-1/+2
* A bit of DMA infrastructureroot2011-06-161-3/+49
* Move to new FPGA designroot2011-06-161-9/+31
* Do not crash if model is not definedSuren A. Chilingaryan2011-05-181-6/+8
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