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authorSuren A. Chilingaryan <csa@suren.me>2015-11-20 18:26:29 +0100
committerSuren A. Chilingaryan <csa@suren.me>2015-11-20 18:26:29 +0100
commitbba9c619c79175b58359116b52a889e30a632d07 (patch)
tree6da3898d50880e96f2afa5d5139bd16263fccf42 /pcilib/pcilib.h
parentfe5bca8604e8c381d3fe2cce3073dd6602d016d1 (diff)
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64-bit access to BAR memory
Diffstat (limited to 'pcilib/pcilib.h')
-rw-r--r--pcilib/pcilib.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/pcilib/pcilib.h b/pcilib/pcilib.h
index cfe3e96..3e7cf2b 100644
--- a/pcilib/pcilib.h
+++ b/pcilib/pcilib.h
@@ -327,22 +327,24 @@ char *pcilib_resolve_bar_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr
* @param[in,out] ctx - pcilib context
* @param[in] bar - the BAR to read, use PCILIB_BAR_DETECT to detect bar by the specified physical address
* @param[in] addr - absolute physical address to read or the offset in the specified bar
- * @param[in] size - number of bytes to read
+ * @param[in] access - word size (access width in bytes)
+ * @param[in] n - number of words to read
* @param[out] buf - the read data will be placed in this buffer
* @return - error code or 0 on success
*/
-int pcilib_read(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, size_t size, void *buf);
+int pcilib_read(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, uint8_t access, size_t n, void *buf);
/**
* Performs PIO write to the PCI BAR. The BAR will be automatically mapped and unmapped if necessary.
* @param[in,out] ctx - pcilib context
* @param[in] bar - the BAR to write, use PCILIB_BAR_DETECT to detect bar by the specified physical address
* @param[in] addr - absolute physical address to write or the offset in the specified bar
- * @param[in] size - number of bytes to write
+ * @param[in] access - word size (access width in bytes)
+ * @param[in] n - number of words to write
* @param[out] buf - the pointer to the data to be written
* @return - error code or 0 on success
*/
-int pcilib_write(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, size_t size, void *buf);
+int pcilib_write(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, uint8_t access, size_t n, void *buf);
/**
* Performs PIO read from the PCI BAR. The specified address is treated as FIFO and will be read