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authorSuren A. Chilingaryan <csa@suren.me>2016-03-02 02:49:28 +0100
committerSuren A. Chilingaryan <csa@suren.me>2016-03-02 02:49:28 +0100
commit3c58980b3ca558096340e51c215897e8614ba00a (patch)
tree54d5f8cf48c7331586ed110a548b33b161f8093e /pyserver/static
parentadc657ebcd01ecc2cc5f110453ef00dffde2d5c0 (diff)
parenta5da7db50d02878b6d9c844b18d0d3f8ccf6c62b (diff)
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Distinguish between hardware and bus addresses in pcilib and fix cli reading from DMA when very low DMA timeout is set
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