diff options
-rw-r--r-- | CMakeLists.txt | 1 | ||||
-rw-r--r-- | docs/Doxyfile.in | 2 | ||||
-rw-r--r-- | pcilib/CMakeLists.txt | 1 | ||||
-rw-r--r-- | pcilib/pcilib.h | 1 | ||||
-rw-r--r-- | pcilib/pcipywrap.c | 84 | ||||
-rw-r--r-- | pcilib/pcipywrap.i | 5 | ||||
-rw-r--r-- | pcilib/xml.c | 16 | ||||
-rw-r--r-- | pcitool/cli.c | 6 | ||||
-rw-r--r-- | xml/test_pywrap/props.xml | 3 | ||||
-rw-r--r-- | xml/test_pywrap/test_prop2.py | 2 | ||||
-rw-r--r-- | xml/types.xsd | 1 |
11 files changed, 95 insertions, 27 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index a0fe0f0..bebc41e 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -36,6 +36,7 @@ SET(ENV{PKG_CONFIG_PATH} "${LIB_INSTALL_DIR}/pkgconfig:$ENV{PKG_CONFIG_PATH}") find_package(PkgConfig REQUIRED) find_package(Threads REQUIRED) find_package(PythonLibs 2.7 REQUIRED) +find_package(SWIG REQUIRED) set(EXTRA_SYSTEM_LIBS -lrt) diff --git a/docs/Doxyfile.in b/docs/Doxyfile.in index ef98587..f87b220 100644 --- a/docs/Doxyfile.in +++ b/docs/Doxyfile.in @@ -243,7 +243,7 @@ TCL_SUBST = # members will be omitted, etc. # The default value is: NO. -OPTIMIZE_OUTPUT_FOR_C = NO +OPTIMIZE_OUTPUT_FOR_C = YES # Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or # Python sources only. Doxygen will then generate output that is more tailored diff --git a/pcilib/CMakeLists.txt b/pcilib/CMakeLists.txt index 41a1169..b1f5251 100644 --- a/pcilib/CMakeLists.txt +++ b/pcilib/CMakeLists.txt @@ -14,7 +14,6 @@ target_link_libraries(pcilib dma protocols views ${CMAKE_THREAD_LIBS_INIT} ${UFO add_dependencies(pcilib dma protocols views) #Creating python wrapping -FIND_PACKAGE(SWIG REQUIRED) INCLUDE(${SWIG_USE_FILE}) INCLUDE_DIRECTORIES(${CMAKE_CURRENT_SOURCE_DIR}) diff --git a/pcilib/pcilib.h b/pcilib/pcilib.h index 3e7cf2b..4d2b7e9 100644 --- a/pcilib/pcilib.h +++ b/pcilib/pcilib.h @@ -54,6 +54,7 @@ typedef enum { PCILIB_REGISTER_RW1C = 5, PCILIB_REGISTER_W1I = 8, /**< writting 1 inversts the bit, writting 0 keeps the value */ PCILIB_REGISTER_RW1I = 9, + PCILIB_REGISTER_NO_CHK = 16 /**< dont check register value after set*/ } pcilib_register_mode_t; typedef enum { diff --git a/pcilib/pcipywrap.c b/pcilib/pcipywrap.c index bed4b31..50a3074 100644 --- a/pcilib/pcipywrap.c +++ b/pcilib/pcipywrap.c @@ -26,7 +26,7 @@ PyObject* __createPcilibInstance(const char *fpga_device, const char *model) /*! * \brief Sets python exeption text. Function interface same as printf. */ -void setPyExeptionText(const char* msg, ...) +void __setPyExeptionText(const char* msg, ...) { char *buf; size_t sz; @@ -55,13 +55,13 @@ void setPyExeptionText(const char* msg, ...) /*! * \brief Sets pcilib context to wraper. * \param[in] addr Pointer to pcilib_t, serialized to bytearray - * \return true, serialized to PyObject, NULL with exeption text, if failed. + * \return 1, serialized to PyObject or NULL with exeption text, if failed. */ PyObject* __setPcilib(PyObject* addr) { if(!PyByteArray_Check(addr)) { - setPyExeptionText(PyExc_Exception, "Incorrect addr type. Only bytearray is allowed"); + __setPyExeptionText(PyExc_Exception, "Incorrect addr type. Only bytearray is allowed"); return; } @@ -150,20 +150,18 @@ int pcilib_convert_pyobject_to_val(pcilib_t* ctx, PyObject* pyVal, pcilib_value_ /*! - * \brief Reads register value. + * \brief Reads register value. Wrap for pcilib_read_register function. * \param[in] regname the name of the register * \param[in] bank should specify the bank name if register with the same name may occur in multiple banks, NULL otherwise - * \return register value, can be integer or float type + * \return register value, can be integer or float type; NULL with exeption text, if failed. */ PyObject* read_register(const char *regname, const char *bank) { if(!__ctx) { - setPyExeptionText("pcilib_t handler not initialized"); + __setPyExeptionText("pcilib_t handler not initialized"); return NULL; } - - pcilib_get_dma_description(__ctx); pcilib_value_t val = {0}; pcilib_register_value_t reg_value; @@ -173,26 +171,72 @@ PyObject* read_register(const char *regname, const char *bank) err = pcilib_read_register(__ctx, bank, regname, ®_value); if(err) { - setPyExeptionText("Failed: read_register (%i)", err); + __setPyExeptionText("Failed: pcilib_read_register (%i)", err); return NULL; } err = pcilib_set_value_from_register_value(__ctx, &val, reg_value); if(err) { - setPyExeptionText("Failed: pcilib_set_value_from_register_value (%i)", err); + __setPyExeptionText("Failed: pcilib_set_value_from_register_value (%i)", err); return NULL; } - return pcilib_convert_val_to_pyobject(__ctx, &val, setPyExeptionText); + return pcilib_convert_val_to_pyobject(__ctx, &val, __setPyExeptionText); } +/*! + * \brief Writes value to register. Wrap for pcilib_write_register function. + * \param[in] val Register value, that needs to be set. Can be int, float or string. + * \param[in] regname the name of the register + * \param[in] bank should specify the bank name if register with the same name may occur in multiple banks, NULL otherwise + * \return 1, serialized to PyObject or NULL with exeption text, if failed. + */ +PyObject* write_register(PyObject* val, const char *regname, const char *bank) +{ + if(!__ctx) + { + __setPyExeptionText("pcilib_t handler not initialized"); + return NULL; + } + + pcilib_value_t val_internal = {0}; + pcilib_register_value_t reg_value; + + int err; + err = pcilib_convert_pyobject_to_val(__ctx, val, &val_internal); + if(err) + { + __setPyExeptionText("Failed pcilib_convert_pyobject_to_val (%i)", err); + return NULL; + } + + reg_value = pcilib_get_value_as_register_value(__ctx, &val_internal, &err); + if(err) + { + __setPyExeptionText("Failed: pcilib_get_value_as_register_value (%i)", err); + return NULL; + } + + err = pcilib_write_register(__ctx, bank, regname, reg_value); + if(err) + { + __setPyExeptionText("Failed: pcilib_write_register (%i)", err); + return NULL; + } + return PyInt_FromLong((long)1); +} +/*! + * \brief Reads propety value. Wrap for pcilib_get_property function. + * \param[in] prop property name (full name including path) + * \return property value, can be integer or float type; NULL with exeption text, if failed. + */ PyObject* get_property(const char *prop) { if(!__ctx) { - setPyExeptionText("pcilib_t handler not initialized"); + __setPyExeptionText("pcilib_t handler not initialized"); return NULL; } @@ -203,20 +247,26 @@ PyObject* get_property(const char *prop) if(err) { - setPyExeptionText("Failed pcilib_get_property (%i)", err); + __setPyExeptionText("Failed pcilib_get_property (%i)", err); return NULL; } - return pcilib_convert_val_to_pyobject(__ctx, &val, setPyExeptionText); + return pcilib_convert_val_to_pyobject(__ctx, &val, __setPyExeptionText); } +/*! + * \brief Writes value to property. Wrap for pcilib_set_property function. + * \param[in] prop property name (full name including path) + * \param[in] val Property value, that needs to be set. Can be int, float or string. + * \return 1, serialized to PyObject or NULL with exeption text, if failed. + */ PyObject* set_property(const char *prop, PyObject* val) { int err; if(!__ctx) { - setPyExeptionText("pcilib_t handler not initialized"); + __setPyExeptionText("pcilib_t handler not initialized"); return NULL; } @@ -224,7 +274,7 @@ PyObject* set_property(const char *prop, PyObject* val) err = pcilib_convert_pyobject_to_val(__ctx, val, &val_internal); if(err) { - setPyExeptionText("pcilib_convert_pyobject_to_val (%i)", err); + __setPyExeptionText("Failed pcilib_convert_pyobject_to_val (%i)", err); return NULL; } @@ -232,7 +282,7 @@ PyObject* set_property(const char *prop, PyObject* val) if(err) { - setPyExeptionText("Failed pcilib_get_property (%i)", err); + __setPyExeptionText("Failed pcilib_get_property (%i)", err); return NULL; } diff --git a/pcilib/pcipywrap.i b/pcilib/pcipywrap.i index 8d0f74e..cd632f8 100644 --- a/pcilib/pcipywrap.i +++ b/pcilib/pcipywrap.i @@ -1,7 +1,10 @@ %module pcipywrap -extern PyObject* read_register(const char *regname, const char *bank = NULL); extern PyObject* __createPcilibInstance(const char *fpga_device, const char *model = NULL); extern PyObject* __setPcilib(PyObject* addr); + +extern PyObject* read_register(const char *regname, const char *bank = NULL); +extern PyObject* write_register(PyObject* val, const char *regname, const char *bank = NULL); + extern PyObject* get_property(const char *prop); extern PyObject* set_property(const char *prop, PyObject* val); diff --git a/pcilib/xml.c b/pcilib/xml.c index 2384e95..099da76 100644 --- a/pcilib/xml.c +++ b/pcilib/xml.c @@ -492,6 +492,8 @@ static int pcilib_xml_create_bank(pcilib_t *ctx, xmlXPathContextPtr xpath, xmlDo static int pcilib_xml_parse_view(pcilib_t *ctx, xmlXPathContextPtr xpath, xmlDocPtr doc, xmlNodePtr node, pcilib_view_description_t *desc) { xmlAttrPtr cur; const char *value, *name; + + int register_no_chk = 0; for (cur = node->properties; cur != NULL; cur = cur->next) { if (!cur->children) continue; @@ -539,7 +541,15 @@ static int pcilib_xml_parse_view(pcilib_t *ctx, xmlXPathContextPtr xpath, xmlDoc return PCILIB_ERROR_INVALID_DATA; } } - } + else if (!strcasecmp(name, "no_set_check")) { + if (!strcasecmp(value, "1")) + register_no_chk = 1; + } + } + if(register_no_chk) + { + desc->mode |= PCILIB_REGISTER_NO_CHK; + } return 0; } @@ -550,7 +560,7 @@ static int pcilib_xml_create_script_view(pcilib_t *ctx, xmlXPathContextPtr xpath const char *value, *name; pcilib_view_context_t *view_ctx; - pcilib_access_mode_t mode = 0; + pcilib_access_mode_t mode = PCILIB_REGISTER_NO_CHK; pcilib_script_view_description_t desc = {{0}}; desc.base.api = &pcilib_script_view_api; @@ -595,7 +605,7 @@ static int pcilib_xml_create_transform_view(pcilib_t *ctx, xmlXPathContextPtr xp const char *value, *name; pcilib_view_context_t *view_ctx; - pcilib_access_mode_t mode = 0; + pcilib_access_mode_t mode = PCILIB_REGISTER_NO_CHK; pcilib_transform_view_description_t desc = {{0}}; desc.base.api = &pcilib_transform_view_api; diff --git a/pcitool/cli.c b/pcitool/cli.c index 8350d24..cb87dcb 100644 --- a/pcitool/cli.c +++ b/pcitool/cli.c @@ -1702,10 +1702,12 @@ int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info if ((model_info->registers[regid].mode&PCILIB_REGISTER_RW) == PCILIB_REGISTER_RW) { const char *format = (val.format?val.format:"%u"); + err = pcilib_read_register(handle, bank, reg, &verify); if (err) Error("Error reading back register %s for verification\n", reg); - - if (verify != value) { + + if (!((model_info->registers[regid].mode&PCILIB_REGISTER_NO_CHK) == PCILIB_REGISTER_NO_CHK) && + verify != value) { Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify); } else { printf("%s = ", reg); diff --git a/xml/test_pywrap/props.xml b/xml/test_pywrap/props.xml index 59d593c..8e3078e 100644 --- a/xml/test_pywrap/props.xml +++ b/xml/test_pywrap/props.xml @@ -9,7 +9,8 @@ register="test_prop2" unit="C" script="test_prop2.py" - description="test python script #1"/> + description="test python script #1" + no_set_check="1"/> <transform path="/test/prop3" register="test_prop3" unit="C" diff --git a/xml/test_pywrap/test_prop2.py b/xml/test_pywrap/test_prop2.py index 68c6f1e..a831fdd 100644 --- a/xml/test_pywrap/test_prop2.py +++ b/xml/test_pywrap/test_prop2.py @@ -1,7 +1,7 @@ import pcipywrap def read_from_register(): - return pcipywrap.get_property('/registers/fpga/reg1') / 3 + return pcipywrap.get_property('/registers/fpga/reg1') / 2 def write_to_register(value): pcipywrap.set_property('/registers/fpga/reg1', value*3) diff --git a/xml/types.xsd b/xml/types.xsd index c9e5d2f..b0eb573 100644 --- a/xml/types.xsd +++ b/xml/types.xsd @@ -59,6 +59,7 @@ <xsd:attribute name="unit" type="xsd:string" /> <xsd:attribute name="type" type="pcilib_data_type_t" /> <xsd:attribute name="mode" type="pcilib_access_mode_t" /> + <xsd:attribute name="no_set_check" type="bool_t" default="0"/> <xsd:attribute name="visible" type="bool_t" default="0" /> <xsd:attribute name="description" type="xsd:string" /> </xsd:complexType> |