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* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-141-0/+2
* Fix compilation issuesSuren A. Chilingaryan2011-07-111-2/+2
* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-2/+7
* North West Logick DMA implementationroot2011-07-041-5/+9
* A bit of DMA infrastructureroot2011-06-161-2/+2
* Remove unsupported devicesroot2011-06-161-24/+0
* Move to new FPGA designroot2011-06-161-1/+2
* Initial support for registers, infrastructure onlySuren A. Chilingaryan2011-02-181-0/+32
* Print a bit more detailsSuren A. Chilingaryan2011-02-131-0/+1
* Initial importSuren A. Chilingaryan2011-02-131-0/+180