Commit message (Expand) | Author | Age | Files | Lines | |
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* | First iteration of work to preserve DMA state between executions | Suren A. Chilingaryan | 2011-07-14 | 1 | -0/+2 |
* | Fix compilation issues | Suren A. Chilingaryan | 2011-07-11 | 1 | -2/+2 |
* | IRQ support in NWL DMA engine | Suren A. Chilingaryan | 2011-07-11 | 1 | -2/+7 |
* | North West Logick DMA implementation | root | 2011-07-04 | 1 | -5/+9 |
* | A bit of DMA infrastructure | root | 2011-06-16 | 1 | -2/+2 |
* | Remove unsupported devices | root | 2011-06-16 | 1 | -24/+0 |
* | Move to new FPGA design | root | 2011-06-16 | 1 | -1/+2 |
* | Initial support for registers, infrastructure only | Suren A. Chilingaryan | 2011-02-18 | 1 | -0/+32 |
* | Print a bit more details | Suren A. Chilingaryan | 2011-02-13 | 1 | -0/+1 |
* | Initial import | Suren A. Chilingaryan | 2011-02-13 | 1 | -0/+180 |