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* More structural changes to get ready for stand-alone event enginesSuren A. Chilingaryan2015-04-241-226/+0
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* Big redign of model structuresSuren A. Chilingaryan2015-04-201-185/+31
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* Initial implementation of IPEDMA, dummy driver for KAPTURE, start of API changesSuren A. Chilingaryan2014-12-191-1/+2
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* Add frame-reject registers to IPECamera modelSuren A. Chilingaryan2014-02-221-1/+5
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* DMA-independent IRQ functionsSuren A. Chilingaryan2012-11-131-0/+1
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* print results even if no frames grabbedSuren A. Chilingaryan2012-10-091-1/+1
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* small cleanupSuren A. Chilingaryan2011-12-141-0/+5
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* Print more statisticsSuren A. Chilingaryan2011-12-131-1/+1
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* Allow to configure the number of preprocessing threadsSuren A. Chilingaryan2011-12-121-0/+8
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* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-121-6/+8
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* Parse required event & data_typeSuren A. Chilingaryan2011-12-091-1/+3
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* Initial support of event streaming in cliSuren A. Chilingaryan2011-12-091-8/+11
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* new event architecture, first trialSuren A. Chilingaryan2011-12-081-13/+78
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* Improvements of DMA engineSuren A. Chilingaryan2011-10-261-5/+22
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* Properly perform synchronization of DMA buffersSuren A. Chilingaryan2011-10-231-2/+2
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* Accept short addresses for IPECamera FPGA registersSuren A. Chilingaryan2011-10-211-1/+2
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* IRQ acknowledgement support in the engine APISuren A. Chilingaryan2011-07-181-3/+8
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* Change timeout definition in Events API from struct timespec to pcilib_timeout_tSuren A. Chilingaryan2011-07-181-10/+3
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* Implement DMA access synchronization in the driverSuren A. Chilingaryan2011-07-161-1/+1
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* Separate NWL loopback code, provide DMA start/stop interfacesSuren A. Chilingaryan2011-07-121-0/+2
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* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-121-1/+6
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* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-121-6/+14
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* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-111-5/+6
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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-1/+4
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-091-7/+7
| | | | (bitmasks), list NWL DMA registers
* Compilation fixSuren A. Chilingaryan2011-07-061-4/+4
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* A bit of renamingSuren A. Chilingaryan2011-07-061-20/+16
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* Include type in the register descriptionSuren A. Chilingaryan2011-07-061-1/+2
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* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-22/+9
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* North West Logick DMA implementationroot2011-07-041-9/+24
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* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-1/+2
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* Enumerate DMA enginesroot2011-06-171-4/+9
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* A bit of DMA infrastructureroot2011-06-161-1/+34
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* Move to new FPGA designroot2011-06-161-3/+11
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* Introduce pcilib_context_t type instead pointer to voidSuren A. Chilingaryan2011-04-141-10/+11
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* Accept timeout parameter to get_next_event callSuren A. Chilingaryan2011-04-141-2/+2
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* Support non-callback way of getting eventsSuren A. Chilingaryan2011-04-141-1/+5
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* Allow access to implementation context and provide call to set size of ↵Suren A. Chilingaryan2011-04-121-0/+1
| | | | internal buffer for IPECamera
* Prototype of IPECamera image protocolSuren A. Chilingaryan2011-04-121-3/+20
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* Infrastructure for event APISuren A. Chilingaryan2011-04-121-2/+57
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* Set warning handlerMatthias Vogelgesang2011-03-141-1/+1
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* Move model decription to public headerSuren A. Chilingaryan2011-03-111-0/+4
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* Provide single header for librarySuren A. Chilingaryan2011-03-091-0/+126
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