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* More structural changes to get ready for stand-alone event enginesSuren A. Chilingaryan2015-04-241-44/+0
* Big redign of model structuresSuren A. Chilingaryan2015-04-201-7/+5
* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-121-0/+1
* Gathering a bit of statisticsSuren A. Chilingaryan2011-12-091-0/+1
* Initial support of event streaming in cliSuren A. Chilingaryan2011-12-091-3/+6
* new event architecture, first trialSuren A. Chilingaryan2011-12-081-0/+5
* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-171-2/+1
* Implement DMA access synchronization in the driverSuren A. Chilingaryan2011-07-161-0/+7
* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-121-0/+2
* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-061-0/+2
* North West Logick DMA implementationroot2011-07-041-0/+2
* clean upSuren A. Chilingaryan2011-04-121-1/+1
* Support for FPGA registersSuren A. Chilingaryan2011-03-091-0/+3
* Initial support of IPECamera protocolSuren A. Chilingaryan2011-03-081-4/+16
* Initial support for registers, infrastructure onlySuren A. Chilingaryan2011-02-181-1/+4
* Print a bit more detailsSuren A. Chilingaryan2011-02-131-0/+1
* Initial importSuren A. Chilingaryan2011-02-131-0/+5