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authorVasilii Chernov <vchernov@inr.ru>2016-02-09 17:32:11 +0100
committerVasilii Chernov <vchernov@inr.ru>2016-02-09 17:32:11 +0100
commitdce856c1a16098fe7a1df2338df60073261da94a (patch)
tree61285a125a21bd311c3835f8b0fb8a7cc94d8f76 /xml
parentaaac7b80d1e003a3dbc4fe0f831a68e5449c846d (diff)
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Add write_register python wrap. Add no_set_check attribute to pcilib_view_t type
Diffstat (limited to 'xml')
-rw-r--r--xml/test_pywrap/props.xml3
-rw-r--r--xml/test_pywrap/test_prop2.py2
-rw-r--r--xml/types.xsd1
3 files changed, 4 insertions, 2 deletions
diff --git a/xml/test_pywrap/props.xml b/xml/test_pywrap/props.xml
index 59d593c..8e3078e 100644
--- a/xml/test_pywrap/props.xml
+++ b/xml/test_pywrap/props.xml
@@ -9,7 +9,8 @@
register="test_prop2"
unit="C"
script="test_prop2.py"
- description="test python script #1"/>
+ description="test python script #1"
+ no_set_check="1"/>
<transform path="/test/prop3"
register="test_prop3"
unit="C"
diff --git a/xml/test_pywrap/test_prop2.py b/xml/test_pywrap/test_prop2.py
index 68c6f1e..a831fdd 100644
--- a/xml/test_pywrap/test_prop2.py
+++ b/xml/test_pywrap/test_prop2.py
@@ -1,7 +1,7 @@
import pcipywrap
def read_from_register():
- return pcipywrap.get_property('/registers/fpga/reg1') / 3
+ return pcipywrap.get_property('/registers/fpga/reg1') / 2
def write_to_register(value):
pcipywrap.set_property('/registers/fpga/reg1', value*3)
diff --git a/xml/types.xsd b/xml/types.xsd
index c9e5d2f..b0eb573 100644
--- a/xml/types.xsd
+++ b/xml/types.xsd
@@ -59,6 +59,7 @@
<xsd:attribute name="unit" type="xsd:string" />
<xsd:attribute name="type" type="pcilib_data_type_t" />
<xsd:attribute name="mode" type="pcilib_access_mode_t" />
+ <xsd:attribute name="no_set_check" type="bool_t" default="0"/>
<xsd:attribute name="visible" type="bool_t" default="0" />
<xsd:attribute name="description" type="xsd:string" />
</xsd:complexType>