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* Reverts r99 and fixes inheritance of kernel buffers properlySuren A. Chilingaryan2011-12-121-2/+2
* multithread preprocessing of ipecamera frames and code reorganizationSuren A. Chilingaryan2011-12-128-26/+29
* new event architecture, first trialSuren A. Chilingaryan2011-12-081-11/+13
* Improvements of DMA engineSuren A. Chilingaryan2011-10-2610-153/+139
* Fix DMA synchronization for writes as wellSuren A. Chilingaryan2011-10-241-0/+3
* Do not sync to device, looks like it is not requiredSuren A. Chilingaryan2011-10-231-1/+2
* Sync only required buffersSuren A. Chilingaryan2011-10-232-16/+2
* Properly perform synchronization of DMA buffersSuren A. Chilingaryan2011-10-232-4/+8
* Precisely estimate used buffers for C2S enginesSuren A. Chilingaryan2011-10-221-5/+58
* Provide information about active DMA engines & buffersSuren A. Chilingaryan2011-10-222-0/+37
* Fix bug causing failures of NWL engine to inherit kernel buffersroot2011-10-191-1/+5
* Disable debuggingroot2011-07-271-1/+1
* Few fixes in IPE Camera coderoot2011-07-271-2/+2
* Few fixes for IPE Camera modificationSuren A. Chilingaryan2011-07-191-31/+34
* IRQ acknowledgement support in the engine APISuren A. Chilingaryan2011-07-183-18/+21
* Correctly check if DMA is already enabledSuren A. Chilingaryan2011-07-171-1/+1
* Do not try to verify write-only registersSuren A. Chilingaryan2011-07-171-1/+1
* Few more fixesSuren A. Chilingaryan2011-07-173-8/+21
* Correctly detect the tail pointer of C2S ringSuren A. Chilingaryan2011-07-174-34/+19
* Stop only started enginesSuren A. Chilingaryan2011-07-171-3/+18
* Handle correctly reference counting in the driverSuren A. Chilingaryan2011-07-172-11/+13
* Few fixesSuren A. Chilingaryan2011-07-172-6/+15
* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-175-87/+204
* Implement DMA access synchronization in the driverSuren A. Chilingaryan2011-07-162-3/+6
* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-146-201/+228
* Support modifications of DMA engine and allow DMA customizations by Event engineSuren A. Chilingaryan2011-07-145-89/+89
* Few fixesSuren A. Chilingaryan2011-07-122-7/+18
* Separate NWL loopback code, provide DMA start/stop interfacesSuren A. Chilingaryan2011-07-128-77/+136
* Another reorganization of NWL sourcesSuren A. Chilingaryan2011-07-126-285/+301
* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-125-18/+121
* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-124-12/+17
* Few fixesSuren A. Chilingaryan2011-07-121-5/+21
* Fix compilation issuesSuren A. Chilingaryan2011-07-111-5/+5
* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-114-128/+171
* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-113-321/+335
* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-117-129/+244
* Support dynamic registers, support register offsets and multiregisters (bitma...Suren A. Chilingaryan2011-07-092-8/+161
* Add some check to verify if NWL DMA engine have been successfully initializedSuren A. Chilingaryan2011-07-081-5/+3
* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-061-1/+1
* A bit of renamingSuren A. Chilingaryan2011-07-062-12/+12
* Define addresses of NWL enginesroot2011-07-041-1/+3
* North West Logick DMA implementationroot2011-07-043-104/+711
* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-182-1/+102
* Enumerate DMA enginesroot2011-06-172-0/+208